NEWS RELEASE
ASC Announces ALF Compiler, Introduces Low-Power Synthesis at DATEMarch 5, 2002 (DATE 2002) Paris, France - Electronic design automation research and tool development firm Alternative System Concepts, Inc. (ASC) today announced a new ALF Compiler and previewed an upcoming tool that performs Low-Power Synthesis. Both are being shown in the company's booth at the Design, Automation and Test in Europe (DATE) Conference and Exposition this week in Paris. The ASC ALF Compiler checks and processes semiconductor library descriptions written in the Advanced Library Format, an upcoming industry standard (IEEE 1603). Intended for embedding in tools by other EDA tool developers, the ALF Compiler is available for immediate delivery, with various licensing and packaging options to suit each developer's needs. It follows the November 2001 release of the ASC ALF Parser, which the company distributes free from its website to help promote the adoption of ALF. The upcoming Low-Power Synthesis tool automatically reduces the power consumption requirements of electronic designs, providing improvements of two to ten times. It accepts behavioral level descriptions and ALF library definitions, and produces power-optimized, register-transfer level (RTL) designs suitable for processing with conventional EDA tools. Expected to ship in the third quarter of this year, it will be formally launched at the Design Automation Conference in June, with product licensing options and pricing details available at that time. About the ASC ALF CompilerNearing approval as IEEE Standard 1603, ALF provides a long-awaited common library format that robustly supports signal integrity and power characterization (see www.eda.org/alf). ALF is suitable for use with EDA tools at all levels of the development process, and can be compatible with other emerging standards such as OLA. Recognizing the unique suitability of ALF for the company's low-power synthesis efforts, ASC has worked closely with systems design companies and semiconductor manufacturers to help accelerate the language's adoption by the industry. The company has made the ASC ALF Parser freely available, and over one hundred people have downloaded it. ASC is also completing the industry's first IEEE 1603 ALF test suite, which will be administered by industry organization Accellera (www.accellera.org). ASC's new ALF Compiler works with any standard ALF 2.0 library description. It checks for and reports syntactic or semantic errors, and generates internal data structures for access and use by common EDA tools. Running on Unix, Linux, and Windows platforms, it ships complete with user documentation, examples, and a specification of its application programming interface (API). Pre-written routines for accessing the generated ALF data structures are also available. About ASC Low-Power SynthesisThe Low-Power Synthesis tool is targeted to the design of portable and miniaturized devices, including such diverse products as cell phones, medical diagnostic equipment, and space vehicles. It achieves better power reduction results in hours than a team of engineers can achieve in days or weeks. The Low-Power Synthesis tool accepts behavioral VHDL, generates
register transfer level (RTL) Verilog, and is adaptable to work
with other languages. The tool obtains power consumption and other
details of the targeted implementation technology by reading an
ALF description for that library. The RTL descriptions it produces
for the power-optimized design are suitable for use by logic synthesizers,
simulators, and other tools in a conventional EDA work flow. One key to the tool's effectiveness is the innovative use of the
Control and Dataflow Graph (CDFG) for optimization. This process
for low-power design was developed and patented by Princeton University
and is exclusively licensed to ASC. The Low-Power Synthesis tool also incorporates the Princeton-developed
IMPACT routines for iterative algorithm application and evaluation.
IMPACT draws from a suite of different power-reduction techniques,
repeatedly applying, assessing, and keeping or discarding them to
eventually reach an optimized design solution. Because it works at the behavioral level, the ASC Low-Power Synthesis
tool is able to explore and apply a very broad range of techniques,
taking full advantage of the opportunities inherent in the design
and yielding significantly better results than is possible with
lower-level tools. It also contrasts with popular power assessment
tools, which evaluate power characteristics to guide a human designer
but don't actually modify the design to reduce its energy requirements. About ASC
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